Description
HUINS MFP-VP1802-S combines the 7.35M-cell Versal Premium VP1802 with 140 GTM and 28 GTYP transceivers, three FMC+, six QSFP-DD and six NovaRay expansion positions. Dense board-level fan-out for multi-interface RTL partitioning, 400G-class networking bring-up, high-throughput datapaths and pre-silicon hardware/software integration.
Two DDR4 SODIMM sockets, hardened PCIe Gen5 and Ethernet resources, programmable clocks and selectable FMC+ I/O rails support repeatable subsystem integration without constraining the design to a single expansion format.
FPGA Specification
| Versal Premium VP1802 Adaptive SoC | |
| System Logic Cells | 7,351,960 |
| CLB Flip-Flops | 6,721,792 |
| LUTs | 3,360,896 |
| Distributed RAM | 103 Mb |
| Block RAM | 4,941 blocks / 174 Mb |
| UltraRAM | 2,549 blocks / 717 Mb |
| DSP Engines | 14,352 |
| Processing and Memory | |
| Application Processing Unit | Dual-core Arm Cortex-A72 |
| Real-Time Processing Unit | Dual-core Arm Cortex-R5F |
| NoC-to-PL Ports | 100 master / 100 slave |
| DDR Memory Controllers / Bus Width | 4 / 256-bit |
| Transceivers and Hardened IP | |
| GTYP Transceivers | 28 at up to 32.75 Gb/s |
| GTM Transceivers | 140 at up to 58 Gb/s; 70 paired channels at up to 112 Gb/s |
| PCIe with DMA (CPM5) | 2 × Gen5 ×8 |
| PL PCIe Gen5 | 2 × Gen5 ×4 |
| 100G Multirate / 600G Ethernet MAC | 8 / 7 |
| 600G Interlaken / Crypto Engines | 3 / 4 |
| Package | |
| Device | XCVP1802-2MSELSVC4072 |
| Package / Footprint / Pitch | LSVC4072 / 65 × 65 mm / 1.0 mm |
| XPIO / MIO | 132 DDR-only, 516 DDR+PL, 54 PL-only / 78 MIO |
Features
| FPGA and Memory | |
| Adaptive SoC | Versal Premium XCVP1802-2MSELSVC4072 |
| DDR4 SODIMM | 2 sockets, up to 2,666 MT/s |
| High-Speed Expansion | |
| FMC+ 0 / 1 | 24 GTM lanes + 34 LVDS I/Os each; 1.0 / 1.2 / 1.5 V selectable |
| FMC+ 2 | 20 GTYP lanes + 34 LVDS I/Os; 1.0 / 1.2 / 1.5 V selectable |
| QSFP-DD | 6 positions, 8 GTM lanes each; 400G optical-module support |
| NovaRay / NVAF | 6 positions: 5 × 8 GTM lanes; 1 × 8 GTYP lanes |
| Peripheral and Control | |
| JTAG / UART | 14-pin JTAG / 2 × USB-C UART |
| Storage | microSD; 2 × 128 MB QSPI flash |
| Connectivity | USB 2.0; Gigabit Ethernet; 2 × I2C |
| User I/O | 16-position DIP switch; 3 push buttons; 12 LEDs |
| Clock, Power and Mechanical | |
| Clock Generator | Si5391; DDR 200 MHz; FMC+ 125 MHz; QSFP-DD / NVAF 156.25 MHz |
| Power | ATX input |
| Cooling | Dynatron J5 active air cooler |
| PCB | 305 × 210 × 3.35 mm (estimated); 28 layers |
What's Included
- MFP-VP1802-S main board
- 16 GB DDR4 SODIMM × 1
- 32 GB microSD card
- 12 V / 12 A power adapter
- Dynatron J5 active cooler
- Documentation and reference-design media supplied by CodeRobin
Resources & Downloads
Full documentation including user manual, pinout list and schematics is provided by CodeRobin.